Spring 2008
pdf

View schedules for



ECE 462
Logic Design

Credit:  3 hours.


Design of combinational networks, hazards, finite state machines, design of sequential networks in fundamental mode and pulse mode, state reduction, state assignment and races, and fault detection and testing. Same as CS 462 and MATH 491. Prerequisite: ECE 290 or CS 231.


Section Information
CRNTypeSectionTimeDays Location  Instructor
33957  discussion- recitation  10:00 AM - 11:20 AM MW  room 101
Transportation Bldg 
Vasudevan, S 
3 hours